• OPENCORES.ORG
  
  OPENCORES.ORG endorses development and hosts a repository of free, open-source cores (chip designs) and supplemental platforms (boards).
  32-bit asic cell chi cores custom full hdl intellectual pci property risc sdram standard synthesizable system uart verilog vhdl
  in HW > FPGA with fpga hardware hdl opencores opensource programming verilog vhdl
• ModelSim
  How do I compile the UniSim, and CORE Generator HDL libraries?
  in HW > FPGA with fpga hardware hdl modelsim programming systemc unisim verilog vhdl

verilog from all users